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Frequently Asked Questions

A20 / CPU RESET Anomalies

Have you ever wondered why your computer crashes sometimes when you give it the 3-finger salute? I'll bet this happens to you most often when you're using some type of memory manager. This article might explain your problems. But sorry to disappoint you, it doesn't contain a solution -- except hit that big red switch.

Descriptor Cache Anomalies

This file describes anomalies and inconsistencies with the Descriptor Cache Registers. Source code is also included. The source code may not be too useful, as it requires the use of LOADALL. Unfortunately, LOADALL was removed on the Intel486 and later processors.

The NULL Descriptor

Did you ever wonder why the NULL descriptor isn't used by the processor? Well, I won't burst your bubble, I don't know either. But I do what you can use it for, and it's real handy. System's programmers, O/S writers, and general nerds, you need to see this.

Triple Faulting the CPU

Who says old dogs can't learn new tricks? If you've ever done any reasonable amount of system's programming, you know the dilemma you have of writing common source code to get the 80286 and all newer processors out of protected mode. On one extreme, the 80286 can't get out of protected mode without resetting the microprocessor. Intel learned from this mistake, and starting with the 80386 provided a means to gracefully return from protected mode. But the problem is how to write common source code which returns both processors from protected mode, in an efficient manner.